GPIO CZ20

Collaboration diagram for GPIO CZ20:

Data Structures
struct	GPIO_REGISTERS_T
struct	XDMA_REGISTERS_T
	offsets for where to find chip registers needed for xDMA register . see section 10.3in the chip datasheet More...
struct	tr_hal_gpio_settings_t

Macros
#define	TR_HAL_MAX_PIN_NUMBER   (32)
	max pin number
#define	CHIP_MEMORY_MAP_GPIO_BASE   (0x40001000UL)
	chip register addresses section 2.2 of the data sheet explains the Memory map. this gives the base address for how to write the chip registers the chip registers are how the software interacts configures GPIOs, reads GPIOs, and gets/sets information on the chip We create a struct below that addresses the individual registers. This makes it so we can use this base address and a struct field to read or write a chip register
#define	CHIP_MEMORY_MAP_SYS_CTRL_BASE   (0x40000000UL)
#define	CHIP_MEMORY_MAP_XDMA_BASE   (0x40028000UL)
#define	set_output_high   state
#define	set_output_low   interrupt_status
#define	GPIO_CHIP_REGISTERS   ((GPIO_REGISTERS_T *) CHIP_MEMORY_MAP_GPIO_BASE)
#define	XDMA_CHIP_REGISTERS   ((XDMA_REGISTERS_T *) CHIP_MEMORY_MAP_XDMA_BASE)
#define	DEFAULT_GPIO_OUTPUT_CONFIG
#define	DEFAULT_GPIO_INPUT_CONFIG

Typedefs
typedef void(*	tr_hal_gpio_event_callback_t) (tr_hal_gpio_pin_t pin, tr_hal_gpio_event_t event)

Enumerations
enum	tr_hal_pin_mode_t {   TR_HAL_GPIO_MODE_GPIO = 0x00 ,   TR_HAL_GPIO_MODE_UART_0_TX = 0x01 ,   TR_HAL_GPIO_MODE_UART_1_TX = 0x02 ,   TR_HAL_GPIO_MODE_UART_1_RTSN = 0x03 ,   TR_HAL_GPIO_MODE_UART_2_TX = 0x04 ,   TR_HAL_GPIO_MODE_UART_2_RTSN = 0x05 ,   TR_HAL_GPIO_MODE_PWM0 = 0x06 ,   TR_HAL_GPIO_MODE_PWM1 = 0x07 ,   TR_HAL_GPIO_MODE_PWM2 = 0x08 ,   TR_HAL_GPIO_MODE_PWM3 = 0x09 ,   TR_HAL_GPIO_MODE_PWM4 = 0x0A ,   TR_HAL_GPIO_MODE_IRM = 0x0B ,   TR_HAL_GPIO_MODE_I2C_0_MASTER_SCL = 0x0C ,   TR_HAL_GPIO_MODE_I2C_0_MASTER_SDA = 0x0D ,   TR_HAL_GPIO_MODE_I2C_1_MASTER_SCL = 0x0E ,   TR_HAL_GPIO_MODE_I2C_1_MASTER_SDA = 0x0F ,   TR_HAL_GPIO_MODE_I2C_SLAVE_SCL = 0x10 ,   TR_HAL_GPIO_MODE_I2C_SLAVE_SDA = 0x11 ,   TR_HAL_GPIO_MODE_SPI_0_CLK = 0x12 ,   TR_HAL_GPIO_MODE_SPI_0_SDATA_0 = 0x13 ,   TR_HAL_GPIO_MODE_SPI_0_SDATA_1 = 0x14 ,   TR_HAL_GPIO_MODE_SPI_0_SDATA_2 = 0x15 ,   TR_HAL_GPIO_MODE_SPI_0_SDATA_3 = 0x16 ,   TR_HAL_GPIO_MODE_SPI_0_CS_0 = 0x17 ,   TR_HAL_GPIO_MODE_SPI_0_CS_1 = 0x18 ,   TR_HAL_GPIO_MODE_SPI_0_CS_2 = 0x19 ,   TR_HAL_GPIO_MODE_SPI_0_CS_3 = 0x1A ,   TR_HAL_GPIO_MODE_SPI_1_CLK = 0x1B ,   TR_HAL_GPIO_MODE_SPI_1_SDATA_0 = 0x1C ,   TR_HAL_GPIO_MODE_SPI_1_SDATA_1 = 0x1D ,   TR_HAL_GPIO_MODE_SPI_1_SDATA_2 = 0x1E ,   TR_HAL_GPIO_MODE_SPI_1_SDATA_3 = 0x1F ,   TR_HAL_GPIO_MODE_SPI_1_CS_0 = 0x20 ,   TR_HAL_GPIO_MODE_SPI_1_CS_1 = 0x21 ,   TR_HAL_GPIO_MODE_SPI_1_CS_2 = 0x22 ,   TR_HAL_GPIO_MODE_SPI_1_CS_3 = 0x23 ,   TR_HAL_GPIO_MODE_I2S_BCK = 0x24 ,   TR_HAL_GPIO_MODE_I2S_WCK = 0x25 ,   TR_HAL_GPIO_MODE_I2S_SDO = 0x26 ,   TR_HAL_GPIO_MODE_I2S_MCLK = 0x27 ,   TR_HAL_GPIO_MODE_SWDIO = 0x2F ,   TR_HAL_GPIO_MODE_DBG0 = 0x30 ,   TR_HAL_GPIO_MODE_DBG1 = 0x31 ,   TR_HAL_GPIO_MODE_DBG2 = 0x32 ,   TR_HAL_GPIO_MODE_DBG3 = 0x33 ,   TR_HAL_GPIO_MODE_DBG4 = 0x34 ,   TR_HAL_GPIO_MODE_DBG5 = 0x35 ,   TR_HAL_GPIO_MODE_DBG6 = 0x36 ,   TR_HAL_GPIO_MODE_DBG7 = 0x37 ,   TR_HAL_GPIO_MODE_DBG8 = 0x38 ,   TR_HAL_GPIO_MODE_DBG9 = 0x39 ,   TR_HAL_GPIO_MODE_DBGA = 0x3A ,   TR_HAL_GPIO_MODE_DBGB = 0x3B ,   TR_HAL_GPIO_MODE_DBGC = 0x3C ,   TR_HAL_GPIO_MODE_DBGD = 0x3D ,   TR_HAL_GPIO_MODE_DBGE = 0x3E ,   TR_HAL_GPIO_MODE_DBGF = 0x3F ,   TR_HAL_GPIO_OUTPUT_MODE_MAX = 0x3F ,   TR_HAL_GPIO_INPUT_MODE_MIN = 0xE0 ,   TR_HAL_GPIO_MODE_UART_2_CTS = 0xE0 ,   TR_HAL_GPIO_MODE_UART_2_RX = 0xE1 ,   TR_HAL_GPIO_MODE_UART_1_CTS = 0xE2 ,   TR_HAL_GPIO_MODE_UART_1_RX = 0xE3 ,   TR_HAL_GPIO_MODE_I2S_SDI = 0xE4 ,   TR_HAL_GPIO_MODE_UART_0_RX = 0xE5 ,   TR_HAL_GPIO_MODE_SPI_0_PERIPH_SDATA_1 = 0xE6 ,   TR_HAL_GPIO_MODE_SPI_0_PERIPH_SDATA_0 = 0xE7 ,   TR_HAL_GPIO_MODE_SPI_0_PERIPH_CLK = 0xE8 ,   TR_HAL_GPIO_MODE_SPI_0_PERIPH_CS = 0xE9 ,   TR_HAL_GPIO_MODE_SPI_0_PERIPH_SDATA_3 = 0xEA ,   TR_HAL_GPIO_MODE_SPI_0_PERIPH_SDATA_2 = 0xEB ,   TR_HAL_GPIO_MODE_SPI_1_PERIPH_SDATA_1 = 0xEC ,   TR_HAL_GPIO_MODE_SPI_1_PERIPH_SDATA_0 = 0xED ,   TR_HAL_GPIO_MODE_SPI_1_PERIPH_CLK = 0xEE ,   TR_HAL_GPIO_MODE_SPI_1_PERIPH_CS = 0xEF ,   TR_HAL_GPIO_MODE_SPI_1_PERIPH_SDATA_3 = 0xF0 ,   TR_HAL_GPIO_MODE_SPI_1_PERIPH_SDATA_2 = 0xF1 ,   TR_HAL_GPIO_INPUT_MODE_MAX = 0xF1 }
	these are the pin MODEs to be passed to tr_hal_gpio_set_mode note that these are defined by the chip and cannot be changed see section 17.3 of datasheet More...
enum	tr_hal_direction_t {   TR_HAL_GPIO_DIRECTION_OUTPUT = 0 ,   TR_HAL_GPIO_DIRECTION_INPUT = 1 }
	values for setting the direction in the Trident HAL GPIO APIs More...
enum	tr_hal_level_t {   TR_HAL_GPIO_LEVEL_LOW = 0 ,   TR_HAL_GPIO_LEVEL_HIGH = 1 }
	values for setting the level in the Trident HAL GPIO APIs More...
enum	tr_hal_trigger_t {   TR_HAL_GPIO_TRIGGER_NONE = 0 ,   TR_HAL_GPIO_TRIGGER_RISING_EDGE = 1 ,   TR_HAL_GPIO_TRIGGER_FALLING_EDGE = 2 ,   TR_HAL_GPIO_TRIGGER_EITHER_EDGE = 3 ,   TR_HAL_GPIO_TRIGGER_LEVEL_LOW = 4 ,   TR_HAL_GPIO_TRIGGER_LEVEL_HIGH = 5 }
	values for setting the interrupt trigger in the Trident HAL GPIO APIs More...
enum	tr_hal_pullopt_t {   TR_HAL_PULLOPT_PULL_NONE = 0 ,   TR_HAL_PULLOPT_PULL_DOWN_10K = 1 ,   TR_HAL_PULLOPT_PULL_DOWN_100K = 2 ,   TR_HAL_PULLOPT_PULL_DOWN_1M = 3 ,   TR_HAL_PULLOPT_PULL_ALSO_NONE = 4 ,   TR_HAL_PULLOPT_PULL_UP_10K = 5 ,   TR_HAL_PULLOPT_PULL_UP_100K = 6 ,   TR_HAL_PULLOPT_PULL_UP_1M = 7 ,   TR_HAL_PULLOPT_MAX_VALUE = 7 }
	values for setting the pull option in the Trident HAL GPIO APIs NOTE: these CANNOT be changed. These are in the chip data sheet THESE ARE NOT ARBITRARY More...
enum	tr_hal_debounce_time_t {   TR_HAL_DEBOUNCE_TIME_32_CLOCKS = 0 ,   TR_HAL_DEBOUNCE_TIME_64_CLOCKS = 1 ,   TR_HAL_DEBOUNCE_TIME_128_CLOCKS = 2 ,   TR_HAL_DEBOUNCE_TIME_256_CLOCKS = 3 ,   TR_HAL_DEBOUNCE_TIME_512_CLOCKS = 4 ,   TR_HAL_DEBOUNCE_TIME_1024_CLOCKS = 5 ,   TR_HAL_DEBOUNCE_TIME_2048_CLOCKS = 6 ,   TR_HAL_DEBOUNCE_TIME_4096_CLOCKS = 7 ,   TR_HAL_DEBOUNCE_TIME_MAX_VALUE = 7 }
	values for setting the debounce time register each individual GPIO can be set to enable or disable debounce but the debounce time is set globally for ALL GPIOs. NOTE: these CANNOT be changed. These come from the chip data sheet More...
enum	tr_hal_drive_strength_t {   TR_HAL_DRIVE_STRENGTH_4_MA = 0 ,   TR_HAL_DRIVE_STRENGTH_10_MA = 1 ,   TR_HAL_DRIVE_STRENGTH_14_MA = 2 ,   TR_HAL_DRIVE_STRENGTH_20_MA = 3 ,   TR_HAL_DRIVE_STRENGTH_MAX = 3 ,   TR_HAL_DRIVE_STRENGTH_DEFAULT = 3 }
	values for setting the GPIO drive strength in the Trident HAL APIs NOTE: these CANNOT be changed. These come from the chip data sheet More...
enum	tr_hal_wake_mode_t {   TR_HAL_WAKE_MODE_NONE = 0 ,   TR_HAL_WAKE_MODE_INPUT_LOW = 1 ,   TR_HAL_WAKE_MODE_INPUT_HIGH = 2 }
	values for setting the GPIO wake mode More...
enum	tr_hal_gpio_event_t {   TR_HAL_GPIO_EVENT_NONE = 0 ,   TR_HAL_GPIO_EVENT_INPUT_TRIGGERED = 1 }
	GPIO interrupt callback functions. More...

Detailed Description

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Macro Definition Documentation

CHIP_MEMORY_MAP_GPIO_BASE

#define CHIP_MEMORY_MAP_GPIO_BASE   (0x40001000UL)

chip register addresses section 2.2 of the data sheet explains the Memory map. this gives the base address for how to write the chip registers the chip registers are how the software interacts configures GPIOs, reads GPIOs, and gets/sets information on the chip We create a struct below that addresses the individual registers. This makes it so we can use this base address and a struct field to read or write a chip register

---

---

CHIP_MEMORY_MAP_SYS_CTRL_BASE

#define CHIP_MEMORY_MAP_SYS_CTRL_BASE   (0x40000000UL)

CHIP_MEMORY_MAP_XDMA_BASE

#define CHIP_MEMORY_MAP_XDMA_BASE   (0x40028000UL)

DEFAULT_GPIO_INPUT_CONFIG

#define DEFAULT_GPIO_INPUT_CONFIG

Value:

    {                                                         \
        .direction = TR_HAL_GPIO_DIRECTION_INPUT,             \
        .interrupt_trigger = TR_HAL_GPIO_TRIGGER_EITHER_EDGE, \
        .event_handler_fx = NULL,                             \
        .pull_mode = TR_HAL_PULLOPT_PULL_NONE,                \
        .enable_debounce = true,                              \
        .wake_mode = false,                                   \
        .output_level = TR_HAL_GPIO_LEVEL_HIGH,               \
        .enable_open_drain = false,                           \
        .drive_strength =  TR_HAL_DRIVE_STRENGTH_DEFAULT      \
    }

DEFAULT_GPIO_OUTPUT_CONFIG

#define DEFAULT_GPIO_OUTPUT_CONFIG

Value:

    {                                                     \
        .direction = TR_HAL_GPIO_DIRECTION_OUTPUT,        \
        .output_level = TR_HAL_GPIO_LEVEL_HIGH,           \
        .enable_open_drain = false,                       \
        .drive_strength =  TR_HAL_DRIVE_STRENGTH_DEFAULT, \
        .interrupt_trigger = TR_HAL_GPIO_TRIGGER_NONE,    \
        .event_handler_fx = NULL,                         \
        .pull_mode = TR_HAL_PULLOPT_PULL_NONE,            \
        .enable_debounce = false,                         \
        .wake_mode = TR_HAL_WAKE_MODE_NONE,               \
    }

---

default values so an app can quickly load a reasonable set of values for an input or output GPIO

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GPIO_CHIP_REGISTERS

#define GPIO_CHIP_REGISTERS   ((GPIO_REGISTERS_T *) CHIP_MEMORY_MAP_GPIO_BASE)

set_output_high

#define set_output_high   state

set_output_low

#define set_output_low   interrupt_status

TR_HAL_MAX_PIN_NUMBER

#define TR_HAL_MAX_PIN_NUMBER   (32)

max pin number

---

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XDMA_CHIP_REGISTERS

#define XDMA_CHIP_REGISTERS   ((XDMA_REGISTERS_T *) CHIP_MEMORY_MAP_XDMA_BASE)

Typedef Documentation

tr_hal_gpio_event_callback_t

typedef void(* tr_hal_gpio_event_callback_t) (tr_hal_gpio_pin_t pin, tr_hal_gpio_event_t event)

Enumeration Type Documentation

tr_hal_debounce_time_t

enum tr_hal_debounce_time_t

values for setting the debounce time register each individual GPIO can be set to enable or disable debounce but the debounce time is set globally for ALL GPIOs. NOTE: these CANNOT be changed. These come from the chip data sheet

---

---

Enumerator
TR_HAL_DEBOUNCE_TIME_32_CLOCKS
TR_HAL_DEBOUNCE_TIME_64_CLOCKS
TR_HAL_DEBOUNCE_TIME_128_CLOCKS
TR_HAL_DEBOUNCE_TIME_256_CLOCKS
TR_HAL_DEBOUNCE_TIME_512_CLOCKS
TR_HAL_DEBOUNCE_TIME_1024_CLOCKS
TR_HAL_DEBOUNCE_TIME_2048_CLOCKS
TR_HAL_DEBOUNCE_TIME_4096_CLOCKS
TR_HAL_DEBOUNCE_TIME_MAX_VALUE

tr_hal_direction_t

enum tr_hal_direction_t

values for setting the direction in the Trident HAL GPIO APIs

---

---

Enumerator
TR_HAL_GPIO_DIRECTION_OUTPUT
TR_HAL_GPIO_DIRECTION_INPUT

tr_hal_drive_strength_t

enum tr_hal_drive_strength_t

values for setting the GPIO drive strength in the Trident HAL APIs NOTE: these CANNOT be changed. These come from the chip data sheet

---

---

Enumerator
TR_HAL_DRIVE_STRENGTH_4_MA
TR_HAL_DRIVE_STRENGTH_10_MA
TR_HAL_DRIVE_STRENGTH_14_MA
TR_HAL_DRIVE_STRENGTH_20_MA
TR_HAL_DRIVE_STRENGTH_MAX
TR_HAL_DRIVE_STRENGTH_DEFAULT

tr_hal_gpio_event_t

enum tr_hal_gpio_event_t

GPIO interrupt callback functions.

---

---

Enumerator
TR_HAL_GPIO_EVENT_NONE
TR_HAL_GPIO_EVENT_INPUT_TRIGGERED

tr_hal_level_t

enum tr_hal_level_t

values for setting the level in the Trident HAL GPIO APIs

---

---

Enumerator
TR_HAL_GPIO_LEVEL_LOW
TR_HAL_GPIO_LEVEL_HIGH

tr_hal_pin_mode_t

enum tr_hal_pin_mode_t

these are the pin MODEs to be passed to tr_hal_gpio_set_mode note that these are defined by the chip and cannot be changed see section 17.3 of datasheet

---

---

Enumerator
TR_HAL_GPIO_MODE_GPIO
TR_HAL_GPIO_MODE_UART_0_TX
TR_HAL_GPIO_MODE_UART_1_TX
TR_HAL_GPIO_MODE_UART_1_RTSN
TR_HAL_GPIO_MODE_UART_2_TX
TR_HAL_GPIO_MODE_UART_2_RTSN
TR_HAL_GPIO_MODE_PWM0
TR_HAL_GPIO_MODE_PWM1
TR_HAL_GPIO_MODE_PWM2
TR_HAL_GPIO_MODE_PWM3
TR_HAL_GPIO_MODE_PWM4
TR_HAL_GPIO_MODE_IRM
TR_HAL_GPIO_MODE_I2C_0_MASTER_SCL
TR_HAL_GPIO_MODE_I2C_0_MASTER_SDA
TR_HAL_GPIO_MODE_I2C_1_MASTER_SCL
TR_HAL_GPIO_MODE_I2C_1_MASTER_SDA
TR_HAL_GPIO_MODE_I2C_SLAVE_SCL
TR_HAL_GPIO_MODE_I2C_SLAVE_SDA
TR_HAL_GPIO_MODE_SPI_0_CLK
TR_HAL_GPIO_MODE_SPI_0_SDATA_0
TR_HAL_GPIO_MODE_SPI_0_SDATA_1
TR_HAL_GPIO_MODE_SPI_0_SDATA_2
TR_HAL_GPIO_MODE_SPI_0_SDATA_3
TR_HAL_GPIO_MODE_SPI_0_CS_0
TR_HAL_GPIO_MODE_SPI_0_CS_1
TR_HAL_GPIO_MODE_SPI_0_CS_2
TR_HAL_GPIO_MODE_SPI_0_CS_3
TR_HAL_GPIO_MODE_SPI_1_CLK
TR_HAL_GPIO_MODE_SPI_1_SDATA_0
TR_HAL_GPIO_MODE_SPI_1_SDATA_1
TR_HAL_GPIO_MODE_SPI_1_SDATA_2
TR_HAL_GPIO_MODE_SPI_1_SDATA_3
TR_HAL_GPIO_MODE_SPI_1_CS_0
TR_HAL_GPIO_MODE_SPI_1_CS_1
TR_HAL_GPIO_MODE_SPI_1_CS_2
TR_HAL_GPIO_MODE_SPI_1_CS_3
TR_HAL_GPIO_MODE_I2S_BCK
TR_HAL_GPIO_MODE_I2S_WCK
TR_HAL_GPIO_MODE_I2S_SDO
TR_HAL_GPIO_MODE_I2S_MCLK
TR_HAL_GPIO_MODE_SWDIO
TR_HAL_GPIO_MODE_DBG0
TR_HAL_GPIO_MODE_DBG1
TR_HAL_GPIO_MODE_DBG2
TR_HAL_GPIO_MODE_DBG3
TR_HAL_GPIO_MODE_DBG4
TR_HAL_GPIO_MODE_DBG5
TR_HAL_GPIO_MODE_DBG6
TR_HAL_GPIO_MODE_DBG7
TR_HAL_GPIO_MODE_DBG8
TR_HAL_GPIO_MODE_DBG9
TR_HAL_GPIO_MODE_DBGA
TR_HAL_GPIO_MODE_DBGB
TR_HAL_GPIO_MODE_DBGC
TR_HAL_GPIO_MODE_DBGD
TR_HAL_GPIO_MODE_DBGE
TR_HAL_GPIO_MODE_DBGF
TR_HAL_GPIO_OUTPUT_MODE_MAX
TR_HAL_GPIO_INPUT_MODE_MIN
TR_HAL_GPIO_MODE_UART_2_CTS
TR_HAL_GPIO_MODE_UART_2_RX
TR_HAL_GPIO_MODE_UART_1_CTS
TR_HAL_GPIO_MODE_UART_1_RX
TR_HAL_GPIO_MODE_I2S_SDI
TR_HAL_GPIO_MODE_UART_0_RX
TR_HAL_GPIO_MODE_SPI_0_PERIPH_SDATA_1
TR_HAL_GPIO_MODE_SPI_0_PERIPH_SDATA_0
TR_HAL_GPIO_MODE_SPI_0_PERIPH_CLK
TR_HAL_GPIO_MODE_SPI_0_PERIPH_CS
TR_HAL_GPIO_MODE_SPI_0_PERIPH_SDATA_3
TR_HAL_GPIO_MODE_SPI_0_PERIPH_SDATA_2
TR_HAL_GPIO_MODE_SPI_1_PERIPH_SDATA_1
TR_HAL_GPIO_MODE_SPI_1_PERIPH_SDATA_0
TR_HAL_GPIO_MODE_SPI_1_PERIPH_CLK
TR_HAL_GPIO_MODE_SPI_1_PERIPH_CS
TR_HAL_GPIO_MODE_SPI_1_PERIPH_SDATA_3
TR_HAL_GPIO_MODE_SPI_1_PERIPH_SDATA_2
TR_HAL_GPIO_INPUT_MODE_MAX

tr_hal_pullopt_t

enum tr_hal_pullopt_t

values for setting the pull option in the Trident HAL GPIO APIs NOTE: these CANNOT be changed. These are in the chip data sheet THESE ARE NOT ARBITRARY

---

---

Enumerator
TR_HAL_PULLOPT_PULL_NONE
TR_HAL_PULLOPT_PULL_DOWN_10K
TR_HAL_PULLOPT_PULL_DOWN_100K
TR_HAL_PULLOPT_PULL_DOWN_1M
TR_HAL_PULLOPT_PULL_ALSO_NONE
TR_HAL_PULLOPT_PULL_UP_10K
TR_HAL_PULLOPT_PULL_UP_100K
TR_HAL_PULLOPT_PULL_UP_1M
TR_HAL_PULLOPT_MAX_VALUE

tr_hal_trigger_t

enum tr_hal_trigger_t

values for setting the interrupt trigger in the Trident HAL GPIO APIs

---

---

Enumerator
TR_HAL_GPIO_TRIGGER_NONE
TR_HAL_GPIO_TRIGGER_RISING_EDGE
TR_HAL_GPIO_TRIGGER_FALLING_EDGE
TR_HAL_GPIO_TRIGGER_EITHER_EDGE
TR_HAL_GPIO_TRIGGER_LEVEL_LOW
TR_HAL_GPIO_TRIGGER_LEVEL_HIGH

tr_hal_wake_mode_t

enum tr_hal_wake_mode_t

values for setting the GPIO wake mode

---

---

Enumerator
TR_HAL_WAKE_MODE_NONE
TR_HAL_WAKE_MODE_INPUT_LOW
TR_HAL_WAKE_MODE_INPUT_HIGH