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Data Structures | Macros | Typedefs | Enumerations | Functions
Timers CZ20
Trident HAL » T32CZ20 specific
+ Collaboration diagram for Timers CZ20:

Data Structures

struct  FAST_TIMER_REGISTERS_T
 
struct  SLOW_TIMER_REGISTERS_T
 
struct  tr_hal_timer_settings_t
 

Macros

#define TR_HAL_NUM_TIMERS   5
 
#define CHIP_MEMORY_MAP_TIMER0_BASE   (0x4000A000UL)
 chip register addresses section 2.2 of the data sheet explains the Memory map. this gives the base address for how to write the chip registers the chip registers are how the software interacts configures GPIOs, reads GPIOs, and gets/sets information on the chip We create a struct below that addresses the individual registers. This makes it so we can use this base address and a struct field to read or write a chip register
 
#define CHIP_MEMORY_MAP_TIMER1_BASE   (0x4000B000UL)
 
#define CHIP_MEMORY_MAP_TIMER2_BASE   (0x4000C000UL)
 
#define CHIP_MEMORY_MAP_TIMER3_BASE   (0x4000D000UL)
 
#define CHIP_MEMORY_MAP_TIMER4_BASE   (0x4000E000UL)
 
#define CR_COUNT_MODE_DOWN   0x00
 
#define CR_COUNT_MODE_UP   0x01
 
#define CR_ONE_SHOT_DISABLE   0x00
 
#define CR_ONE_SHOT_ENABLE   0x10
 
#define CR_PRESCALER_MASK   0x1C
 
#define CR_INT_ENABLE_BIT   0x20
 
#define CR_MODE_BIT   0x40
 
#define CR_TIMER_RUNNING_BIT   0x80
 
#define CR_INT_STATUS_BIT   0x100
 
#define TIMER0_REGISTERS   ((FAST_TIMER_REGISTERS_T *) CHIP_MEMORY_MAP_TIMER0_BASE)
 
#define TIMER1_REGISTERS   ((FAST_TIMER_REGISTERS_T *) CHIP_MEMORY_MAP_TIMER1_BASE)
 
#define TIMER2_REGISTERS   ((FAST_TIMER_REGISTERS_T *) CHIP_MEMORY_MAP_TIMER2_BASE)
 
#define TIMER3_REGISTERS   ((SLOW_TIMER_REGISTERS_T *) CHIP_MEMORY_MAP_TIMER3_BASE)
 
#define TIMER4_REGISTERS   ((SLOW_TIMER_REGISTERS_T *) CHIP_MEMORY_MAP_TIMER4_BASE)
 
#define DEFAULT_32MHZ_TIMER_CONFIG
 
#define DEFAULT_32KHZ_TIMER_CONFIG
 

Typedefs

typedef void(* tr_hal_timer_callback_t) (tr_hal_timer_id_t expired_timer_id)
 

Enumerations

enum  tr_hal_timer_id_t {
  TIMER_0_ID = 0 ,
  TIMER_1_ID = 1 ,
  TIMER_2_ID = 2 ,
  SLOW_CLOCK_TIMER_0_ID = 3 ,
  SLOW_CLOCK_TIMER_1_ID = 4
}
 
enum  tr_hal_timer_prescalar_t {
  TR_HAL_TIMER_PRESCALER_1 = (0 << 2) ,
  TR_HAL_TIMER_PRESCALER_16 = (1 << 2) ,
  TR_HAL_TIMER_PRESCALER_256 = (2 << 2) ,
  TR_HAL_TIMER_PRESCALER_2 = (3 << 2) ,
  TR_HAL_TIMER_PRESCALER_8 = (4 << 2) ,
  TR_HAL_TIMER_PRESCALER_32 = (5 << 2) ,
  TR_HAL_TIMER_PRESCALER_128 = (6 << 2) ,
  TR_HAL_TIMER_PRESCALER_1024 = (7 << 2) ,
  TR_HAL_TIMER_PRESCALER_MAX = (7 << 2)
}
 

Functions

FAST_TIMER_REGISTERS_T * tr_hal_fast_timer_get_register_address (tr_hal_timer_id_t timer_id)
 
SLOW_TIMER_REGISTERS_T * tr_hal_slow_timer_get_register_address (tr_hal_timer_id_t timer_id)
 

Detailed Description

Macro Definition Documentation

◆ CHIP_MEMORY_MAP_TIMER0_BASE

#define CHIP_MEMORY_MAP_TIMER0_BASE   (0x4000A000UL)

chip register addresses section 2.2 of the data sheet explains the Memory map. this gives the base address for how to write the chip registers the chip registers are how the software interacts configures GPIOs, reads GPIOs, and gets/sets information on the chip We create a struct below that addresses the individual registers. This makes it so we can use this base address and a struct field to read or write a chip register

◆ CHIP_MEMORY_MAP_TIMER1_BASE

#define CHIP_MEMORY_MAP_TIMER1_BASE   (0x4000B000UL)

◆ CHIP_MEMORY_MAP_TIMER2_BASE

#define CHIP_MEMORY_MAP_TIMER2_BASE   (0x4000C000UL)

◆ CHIP_MEMORY_MAP_TIMER3_BASE

#define CHIP_MEMORY_MAP_TIMER3_BASE   (0x4000D000UL)

◆ CHIP_MEMORY_MAP_TIMER4_BASE

#define CHIP_MEMORY_MAP_TIMER4_BASE   (0x4000E000UL)

◆ CR_COUNT_MODE_DOWN

#define CR_COUNT_MODE_DOWN   0x00

◆ CR_COUNT_MODE_UP

#define CR_COUNT_MODE_UP   0x01

◆ CR_INT_ENABLE_BIT

#define CR_INT_ENABLE_BIT   0x20

◆ CR_INT_STATUS_BIT

#define CR_INT_STATUS_BIT   0x100

◆ CR_MODE_BIT

#define CR_MODE_BIT   0x40

◆ CR_ONE_SHOT_DISABLE

#define CR_ONE_SHOT_DISABLE   0x00

◆ CR_ONE_SHOT_ENABLE

#define CR_ONE_SHOT_ENABLE   0x10

◆ CR_PRESCALER_MASK

#define CR_PRESCALER_MASK   0x1C

◆ CR_TIMER_RUNNING_BIT

#define CR_TIMER_RUNNING_BIT   0x80

◆ DEFAULT_32KHZ_TIMER_CONFIG

#define DEFAULT_32KHZ_TIMER_CONFIG
Value:
{ \
.timer_start_value = (32000 * 10), \
.prescalar = TR_HAL_TIMER_PRESCALER_1, \
.timer_repeats = true, \
.timer_enabled = false, \
.interrupt_enabled = true, \
.interrupt_priority = TR_HAL_INTERRUPT_PRIORITY_5, \
.event_handler_fx = NULL, \
}
TR_HAL_INTERRUPT_PRIORITY_5
@ TR_HAL_INTERRUPT_PRIORITY_5
Definition tr_hal_platform.h:44
TR_HAL_TIMER_PRESCALER_1
@ TR_HAL_TIMER_PRESCALER_1
Definition T32CZ20_timers.h:48

◆ DEFAULT_32MHZ_TIMER_CONFIG

#define DEFAULT_32MHZ_TIMER_CONFIG
Value:
{ \
.timer_start_value = (32000 * 10), \
.prescalar = TR_HAL_TIMER_PRESCALER_1024, \
.timer_repeats = true, \
.timer_enabled = false, \
.interrupt_enabled = true, \
.interrupt_priority = TR_HAL_INTERRUPT_PRIORITY_5, \
.event_handler_fx = NULL, \
}
TR_HAL_TIMER_PRESCALER_1024
@ TR_HAL_TIMER_PRESCALER_1024
Definition T32CZ20_timers.h:55

default timer settings

default is to run every 10 seconds, using interrupts, on repeat, not started timers 0,1,2 are 32 MHz and timers 3,4 are 32 KHz

◆ TIMER0_REGISTERS

#define TIMER0_REGISTERS   ((FAST_TIMER_REGISTERS_T *) CHIP_MEMORY_MAP_TIMER0_BASE)

◆ TIMER1_REGISTERS

#define TIMER1_REGISTERS   ((FAST_TIMER_REGISTERS_T *) CHIP_MEMORY_MAP_TIMER1_BASE)

◆ TIMER2_REGISTERS

#define TIMER2_REGISTERS   ((FAST_TIMER_REGISTERS_T *) CHIP_MEMORY_MAP_TIMER2_BASE)

◆ TIMER3_REGISTERS

#define TIMER3_REGISTERS   ((SLOW_TIMER_REGISTERS_T *) CHIP_MEMORY_MAP_TIMER3_BASE)

◆ TIMER4_REGISTERS

#define TIMER4_REGISTERS   ((SLOW_TIMER_REGISTERS_T *) CHIP_MEMORY_MAP_TIMER4_BASE)

◆ TR_HAL_NUM_TIMERS

#define TR_HAL_NUM_TIMERS   5

Typedef Documentation

◆ tr_hal_timer_callback_t

typedef void(* tr_hal_timer_callback_t) (tr_hal_timer_id_t expired_timer_id)

Enumeration Type Documentation

◆ tr_hal_timer_id_t

enum tr_hal_timer_id_t
Enumerator
TIMER_0_ID 
TIMER_1_ID 
TIMER_2_ID 
SLOW_CLOCK_TIMER_0_ID 
SLOW_CLOCK_TIMER_1_ID 

◆ tr_hal_timer_prescalar_t

enum tr_hal_timer_prescalar_t
Enumerator
TR_HAL_TIMER_PRESCALER_1 
TR_HAL_TIMER_PRESCALER_16 
TR_HAL_TIMER_PRESCALER_256 
TR_HAL_TIMER_PRESCALER_2 
TR_HAL_TIMER_PRESCALER_8 
TR_HAL_TIMER_PRESCALER_32 
TR_HAL_TIMER_PRESCALER_128 
TR_HAL_TIMER_PRESCALER_1024 
TR_HAL_TIMER_PRESCALER_MAX 

Function Documentation

◆ tr_hal_fast_timer_get_register_address()

FAST_TIMER_REGISTERS_T * tr_hal_fast_timer_get_register_address ( tr_hal_timer_id_t timer_id)

if the app wants to directly interface with the chip registers, this is a convenience function for getting the address/struct of a particular TIMER so the chip registers can be accessed.

◆ tr_hal_slow_timer_get_register_address()

SLOW_TIMER_REGISTERS_T * tr_hal_slow_timer_get_register_address ( tr_hal_timer_id_t timer_id)