Watchdog CM11

Collaboration diagram for Watchdog CM11:

Data Structures
struct	WDOG_REGISTERS_T
	the struct we use so we can address registers using field names More...
struct	tr_hal_wdog_settings_t

Macros
#define	CHIP_MEMORY_MAP_WDOG_BASE   (0xA0900000UL)
	chip register addresses section 3.1 of the data sheet explains the Memory map. this gives the base address for how to write the chip registers the chip registers are how the software interacts and configures the HAL peripherals. We create a struct below that addresses the individual registers. This makes it so we can use this base address and a struct field to read or write a chip register
#define	TR_HAL_WDOG_MINIMUM_INITIAL_VALUE   40000
#define	TR_HAL_WDOG_CTRL_LOCKOUT   0x01
#define	TR_HAL_WDOG_CTRL_CLK_PRESCALAR_1   0x00
#define	TR_HAL_WDOG_CTRL_CLK_PRESCALAR_16   0x04
#define	TR_HAL_WDOG_CTRL_CLK_PRESCALAR_256   0x08
#define	TR_HAL_WDOG_CTRL_CLK_PRESCALAR_32   0x0C
#define	TR_HAL_WDOG_CTRL_CLK_PRESCALAR_128   0x10
#define	TR_HAL_WDOG_CTRL_CLK_PRESCALAR_1024   0x14
#define	TR_HAL_WDOG_CTRL_CLK_PRESCALAR_4096   0x18
#define	TR_HAL_WDOG_CTRL_CLK_PRESCALAR_ALSO_4096   0x1C
#define	TR_HAL_WDOG_CTRL_RESET_ENABLED   0x20
#define	TR_HAL_WDOG_CTRL_RESET_DISABLED   0x00
#define	TR_HAL_WDOG_CTRL_INTERRUPT_ENABLED   0x40
#define	TR_HAL_WDOG_CTRL_INTERRUPT_DISABLED   0x00
#define	TR_HAL_WDOG_CTRL_TIMER_ENABLED   0x80
#define	TR_HAL_WDOG_CTRL_TIMER_DISABLED   0x00
#define	TR_HAL_WDOG_RESET_WATCHDOG_VALUE   0xA5A5
#define	TR_HAL_WDOG_CLEAR_RESET_COUNTER   0x01
#define	TR_HAL_WDOG_CLEAR_INTERRUPT   0x01
#define	TR_HAL_WDOG_DEFAULT_MIN_TIME_BEFORE_RESET   0
#define	WDOG_REGISTERS   ((WDOG_REGISTERS_T *) CHIP_MEMORY_MAP_WDOG_BASE)
#define	TR_HAL_WDOG_1_SECOND_TIMER_VALUE   40000
#define	TR_HAL_WDOG_1_SECOND_PRESCALAR_VALUE   TR_HAL_WDOG_CLK_PRESCALAR_1024
#define	TR_HAL_WDOG_EVENT_INT_TRIGGERED   0x00000001
#define	DEFAULT_WDOG_CONFIG

Typedefs
typedef void(*	tr_hal_wdog_event_callback_t) (uint32_t event_bitmask)

Enumerations
enum	tr_hal_wdog_prescalar_t {   TR_HAL_WDOG_CLK_PRESCALAR_1 = TR_HAL_WDOG_CTRL_CLK_PRESCALAR_1 ,   TR_HAL_WDOG_CLK_PRESCALAR_16 = TR_HAL_WDOG_CTRL_CLK_PRESCALAR_16 ,   TR_HAL_WDOG_CLK_PRESCALAR_256 = TR_HAL_WDOG_CTRL_CLK_PRESCALAR_256 ,   TR_HAL_WDOG_CLK_PRESCALAR_32 = TR_HAL_WDOG_CTRL_CLK_PRESCALAR_32 ,   TR_HAL_WDOG_CLK_PRESCALAR_128 = TR_HAL_WDOG_CTRL_CLK_PRESCALAR_128 ,   TR_HAL_WDOG_CLK_PRESCALAR_1024 = TR_HAL_WDOG_CTRL_CLK_PRESCALAR_1024 ,   TR_HAL_WDOG_CLK_PRESCALAR_4096 = TR_HAL_WDOG_CTRL_CLK_PRESCALAR_4096 }
	this enum is used for setting the clock prescalar in the settings struct More...

Functions
WDOG_REGISTERS_T *	tr_hal_wdog_get_register_address (void)

Detailed Description

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Macro Definition Documentation

CHIP_MEMORY_MAP_WDOG_BASE

#define CHIP_MEMORY_MAP_WDOG_BASE   (0xA0900000UL)

chip register addresses section 3.1 of the data sheet explains the Memory map. this gives the base address for how to write the chip registers the chip registers are how the software interacts and configures the HAL peripherals. We create a struct below that addresses the individual registers. This makes it so we can use this base address and a struct field to read or write a chip register

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DEFAULT_WDOG_CONFIG

#define DEFAULT_WDOG_CONFIG

Value:

    {                                                       \
        .watchdog_enabled = true,                           \
        .reset_enabled = true,                              \
        .clock_prescalar = TR_HAL_WDOG_1_SECOND_PRESCALAR_VALUE,  \
        .initial_value = (6 * TR_HAL_WDOG_1_SECOND_TIMER_VALUE),  \
        .clear_reset_counter_on_init = false,               \
        .lockout_enabled = false,                           \
        .min_time_before_reset = TR_HAL_WDOG_DEFAULT_MIN_TIME_BEFORE_RESET,\
        .interrupt_enabled = false,                         \
        .interrupt_time_value = 0,                          \
        .interrupt_priority = TR_HAL_INTERRUPT_PRIORITY_5,  \
        .event_handler_fx = NULL,                           \
    }

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default watchdog settings

watchdog ENABLED timer set for 6 seconds keep reset count (don't clear it on init) no lockout, default min time before reset, no interrupts enabled, no event handler function

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TR_HAL_WDOG_1_SECOND_PRESCALAR_VALUE

#define TR_HAL_WDOG_1_SECOND_PRESCALAR_VALUE   TR_HAL_WDOG_CLK_PRESCALAR_1024

TR_HAL_WDOG_1_SECOND_TIMER_VALUE

#define TR_HAL_WDOG_1_SECOND_TIMER_VALUE   40000

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these defines make it easier to setup the wdog for a specific amount of time

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TR_HAL_WDOG_CLEAR_INTERRUPT

#define TR_HAL_WDOG_CLEAR_INTERRUPT   0x01

TR_HAL_WDOG_CLEAR_RESET_COUNTER

#define TR_HAL_WDOG_CLEAR_RESET_COUNTER   0x01

TR_HAL_WDOG_CTRL_CLK_PRESCALAR_1

#define TR_HAL_WDOG_CTRL_CLK_PRESCALAR_1   0x00

TR_HAL_WDOG_CTRL_CLK_PRESCALAR_1024

#define TR_HAL_WDOG_CTRL_CLK_PRESCALAR_1024   0x14

TR_HAL_WDOG_CTRL_CLK_PRESCALAR_128

#define TR_HAL_WDOG_CTRL_CLK_PRESCALAR_128   0x10

TR_HAL_WDOG_CTRL_CLK_PRESCALAR_16

#define TR_HAL_WDOG_CTRL_CLK_PRESCALAR_16   0x04

TR_HAL_WDOG_CTRL_CLK_PRESCALAR_256

#define TR_HAL_WDOG_CTRL_CLK_PRESCALAR_256   0x08

TR_HAL_WDOG_CTRL_CLK_PRESCALAR_32

#define TR_HAL_WDOG_CTRL_CLK_PRESCALAR_32   0x0C

TR_HAL_WDOG_CTRL_CLK_PRESCALAR_4096

#define TR_HAL_WDOG_CTRL_CLK_PRESCALAR_4096   0x18

TR_HAL_WDOG_CTRL_CLK_PRESCALAR_ALSO_4096

#define TR_HAL_WDOG_CTRL_CLK_PRESCALAR_ALSO_4096   0x1C

TR_HAL_WDOG_CTRL_INTERRUPT_DISABLED

#define TR_HAL_WDOG_CTRL_INTERRUPT_DISABLED   0x00

TR_HAL_WDOG_CTRL_INTERRUPT_ENABLED

#define TR_HAL_WDOG_CTRL_INTERRUPT_ENABLED   0x40

TR_HAL_WDOG_CTRL_LOCKOUT

#define TR_HAL_WDOG_CTRL_LOCKOUT   0x01

TR_HAL_WDOG_CTRL_RESET_DISABLED

#define TR_HAL_WDOG_CTRL_RESET_DISABLED   0x00

TR_HAL_WDOG_CTRL_RESET_ENABLED

#define TR_HAL_WDOG_CTRL_RESET_ENABLED   0x20

TR_HAL_WDOG_CTRL_TIMER_DISABLED

#define TR_HAL_WDOG_CTRL_TIMER_DISABLED   0x00

TR_HAL_WDOG_CTRL_TIMER_ENABLED

#define TR_HAL_WDOG_CTRL_TIMER_ENABLED   0x80

TR_HAL_WDOG_DEFAULT_MIN_TIME_BEFORE_RESET

#define TR_HAL_WDOG_DEFAULT_MIN_TIME_BEFORE_RESET   0

TR_HAL_WDOG_EVENT_INT_TRIGGERED

#define TR_HAL_WDOG_EVENT_INT_TRIGGERED   0x00000001

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these are the EVENTS that can be received into the WDOG event handler functions. These are BITMASKs since we can have more than 1 in an event these are what the APP needs to handle in its event_handler_fx

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TR_HAL_WDOG_MINIMUM_INITIAL_VALUE

#define TR_HAL_WDOG_MINIMUM_INITIAL_VALUE   40000

TR_HAL_WDOG_RESET_WATCHDOG_VALUE

#define TR_HAL_WDOG_RESET_WATCHDOG_VALUE   0xA5A5

WDOG_REGISTERS

#define WDOG_REGISTERS   ((WDOG_REGISTERS_T *) CHIP_MEMORY_MAP_WDOG_BASE)

Typedef Documentation

tr_hal_wdog_event_callback_t

typedef void(* tr_hal_wdog_event_callback_t) (uint32_t event_bitmask)

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prototype for callback from the Trident HAL to the app when an event happens

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Enumeration Type Documentation

tr_hal_wdog_prescalar_t

enum tr_hal_wdog_prescalar_t

this enum is used for setting the clock prescalar in the settings struct

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Enumerator
TR_HAL_WDOG_CLK_PRESCALAR_1
TR_HAL_WDOG_CLK_PRESCALAR_16
TR_HAL_WDOG_CLK_PRESCALAR_256
TR_HAL_WDOG_CLK_PRESCALAR_32
TR_HAL_WDOG_CLK_PRESCALAR_128
TR_HAL_WDOG_CLK_PRESCALAR_1024
TR_HAL_WDOG_CLK_PRESCALAR_4096

Function Documentation

tr_hal_wdog_get_register_address()

WDOG_REGISTERS_T * tr_hal_wdog_get_register_address

(

void

)

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if the app wants to directly interface with the chip registers, this is a convenience function for getting the address/struct of the WDOG registers

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