the struct we use so we can address registers using field names More...
#include <T32CM11_pwm.h>
Data Fields | |
| __IO uint32_t | enable |
| __IO uint32_t | reset |
| __IO uint32_t | settings |
| __IO uint32_t | counter_end |
| __IO uint32_t | sequence_repeat |
| __IO uint32_t | rseq_num_elements |
| __IO uint32_t | rseq_num_repeats |
| __IO uint32_t | rseq_delay |
| __IO uint32_t | tseq_num_elements |
| __IO uint32_t | tseq_num_repeats |
| __IO uint32_t | tseq_delay |
| __IO uint32_t | reserved1 [5] |
| __IO uint32_t | dma0_enable |
| __IO uint32_t | dma0_reset |
| __IO uint32_t | dma0_segment_size |
| __IO uint32_t | dma0_start_addr |
| __IO uint32_t | reserved2 [2] |
| __IO uint32_t | dma0_next_ptr_addr |
| __IO uint32_t | dma0_debug |
| __IO uint32_t | dma1_enable |
| __IO uint32_t | dma1_reset |
| __IO uint32_t | dma1_segment_size |
| __IO uint32_t | dma1_start_addr |
| __IO uint32_t | reserved3 [2] |
| __IO uint32_t | dma1_next_ptr_addr |
| __IO uint32_t | dma1_debug |
| __IO uint32_t | reserved4 [8] |
| __IO uint32_t | interrupt_clear |
| __IO uint32_t | interrupt_mask |
| __IO uint32_t | interrupt_status |
| __IO uint32_t | dma0_settings |
| __IO uint32_t | dma0_addr_status |
| __IO uint32_t | dma0_status |
| __IO uint32_t | dma1_settings |
| __IO uint32_t | dma1_addr_status |
| __IO uint32_t | dma1_status |
| __IO uint32_t | reg_data_0_save |
| __IO uint32_t | reg_data_1_save |
the struct we use so we can address registers using field names
| __IO uint32_t PWM_REGISTERS_T::counter_end |
| __IO uint32_t PWM_REGISTERS_T::dma0_addr_status |
| __IO uint32_t PWM_REGISTERS_T::dma0_debug |
| __IO uint32_t PWM_REGISTERS_T::dma0_enable |
| __IO uint32_t PWM_REGISTERS_T::dma0_next_ptr_addr |
| __IO uint32_t PWM_REGISTERS_T::dma0_reset |
| __IO uint32_t PWM_REGISTERS_T::dma0_segment_size |
| __IO uint32_t PWM_REGISTERS_T::dma0_settings |
| __IO uint32_t PWM_REGISTERS_T::dma0_start_addr |
| __IO uint32_t PWM_REGISTERS_T::dma0_status |
| __IO uint32_t PWM_REGISTERS_T::dma1_addr_status |
| __IO uint32_t PWM_REGISTERS_T::dma1_debug |
| __IO uint32_t PWM_REGISTERS_T::dma1_enable |
| __IO uint32_t PWM_REGISTERS_T::dma1_next_ptr_addr |
| __IO uint32_t PWM_REGISTERS_T::dma1_reset |
| __IO uint32_t PWM_REGISTERS_T::dma1_segment_size |
| __IO uint32_t PWM_REGISTERS_T::dma1_settings |
| __IO uint32_t PWM_REGISTERS_T::dma1_start_addr |
| __IO uint32_t PWM_REGISTERS_T::dma1_status |
| __IO uint32_t PWM_REGISTERS_T::enable |
| __IO uint32_t PWM_REGISTERS_T::interrupt_clear |
| __IO uint32_t PWM_REGISTERS_T::interrupt_mask |
| __IO uint32_t PWM_REGISTERS_T::interrupt_status |
| __IO uint32_t PWM_REGISTERS_T::reg_data_0_save |
| __IO uint32_t PWM_REGISTERS_T::reg_data_1_save |
| __IO uint32_t PWM_REGISTERS_T::reserved1 |
| __IO uint32_t PWM_REGISTERS_T::reserved2 |
| __IO uint32_t PWM_REGISTERS_T::reserved3 |
| __IO uint32_t PWM_REGISTERS_T::reserved4 |
| __IO uint32_t PWM_REGISTERS_T::reset |
| __IO uint32_t PWM_REGISTERS_T::rseq_delay |
| __IO uint32_t PWM_REGISTERS_T::rseq_num_elements |
| __IO uint32_t PWM_REGISTERS_T::rseq_num_repeats |
| __IO uint32_t PWM_REGISTERS_T::sequence_repeat |
| __IO uint32_t PWM_REGISTERS_T::settings |
| __IO uint32_t PWM_REGISTERS_T::tseq_delay |
| __IO uint32_t PWM_REGISTERS_T::tseq_num_elements |
| __IO uint32_t PWM_REGISTERS_T::tseq_num_repeats |