Trident IoT SDK
 
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tr_hal_spi_settings_t Struct Reference

#include <T32CM11_spi.h>

+ Collaboration diagram for tr_hal_spi_settings_t:

Data Fields

bool run_as_controller
 
tr_hal_spi_mode_t spi_mode
 
tr_hal_gpio_pin_t clock_pin
 
tr_hal_gpio_pin_t io_0_pin
 
tr_hal_gpio_pin_t io_1_pin
 
tr_hal_gpio_pin_t io_2_pin
 
tr_hal_gpio_pin_t io_3_pin
 
uint8_t num_chip_select_pins
 
tr_hal_gpio_pin_t chip_select_0
 
tr_hal_gpio_pin_t chip_select_1
 
tr_hal_gpio_pin_t chip_select_2
 
tr_hal_gpio_pin_t chip_select_3
 
bool sdo_sdi_pins_crossed
 
bool cpol_bit
 
bool cpha_bit
 
tr_hal_spi_clock_rate_t controller_clock_rate
 
tr_hal_spi_bit_size_t bit_size
 
bool continuous_transfer
 
bool byte_swap
 
bool most_significant_bit_first
 
bool enable_inter_transfer_delay
 
uint16_t delay_in_clock_cycles
 
bool rx_dma_enabled
 
bool tx_dma_enabled
 
uint8_t * rx_dma_buffer
 
uint16_t rx_dma_buff_length
 
uint8_t * raw_tx_buffer
 
uint16_t raw_tx_buff_length
 
tr_hal_spi_receive_callback_t rx_handler_function
 
tr_hal_spi_event_callback_t event_handler_fx
 
bool enable_chip_interrupts
 
tr_hal_int_pri_t interrupt_priority
 
bool wake_on_interrupt
 
tr_hal_spi_tx_watermark_level_t transmit_watermark
 
tr_hal_spi_rx_watermark_level_t receive_watermark
 

Detailed Description


SPI settings struct - this is passed to tr_hal_spi_init

this contains SPI settings


Field Documentation

◆ bit_size

tr_hal_spi_bit_size_t tr_hal_spi_settings_t::bit_size

◆ byte_swap

bool tr_hal_spi_settings_t::byte_swap

◆ chip_select_0

tr_hal_gpio_pin_t tr_hal_spi_settings_t::chip_select_0

◆ chip_select_1

tr_hal_gpio_pin_t tr_hal_spi_settings_t::chip_select_1

◆ chip_select_2

tr_hal_gpio_pin_t tr_hal_spi_settings_t::chip_select_2

◆ chip_select_3

tr_hal_gpio_pin_t tr_hal_spi_settings_t::chip_select_3

◆ clock_pin

tr_hal_gpio_pin_t tr_hal_spi_settings_t::clock_pin

◆ continuous_transfer

bool tr_hal_spi_settings_t::continuous_transfer

◆ controller_clock_rate

tr_hal_spi_clock_rate_t tr_hal_spi_settings_t::controller_clock_rate

◆ cpha_bit

bool tr_hal_spi_settings_t::cpha_bit

◆ cpol_bit

bool tr_hal_spi_settings_t::cpol_bit

◆ delay_in_clock_cycles

uint16_t tr_hal_spi_settings_t::delay_in_clock_cycles

◆ enable_chip_interrupts

bool tr_hal_spi_settings_t::enable_chip_interrupts

◆ enable_inter_transfer_delay

bool tr_hal_spi_settings_t::enable_inter_transfer_delay

◆ event_handler_fx

tr_hal_spi_event_callback_t tr_hal_spi_settings_t::event_handler_fx

◆ interrupt_priority

tr_hal_int_pri_t tr_hal_spi_settings_t::interrupt_priority

◆ io_0_pin

tr_hal_gpio_pin_t tr_hal_spi_settings_t::io_0_pin

◆ io_1_pin

tr_hal_gpio_pin_t tr_hal_spi_settings_t::io_1_pin

◆ io_2_pin

tr_hal_gpio_pin_t tr_hal_spi_settings_t::io_2_pin

◆ io_3_pin

tr_hal_gpio_pin_t tr_hal_spi_settings_t::io_3_pin

◆ most_significant_bit_first

bool tr_hal_spi_settings_t::most_significant_bit_first

◆ num_chip_select_pins

uint8_t tr_hal_spi_settings_t::num_chip_select_pins

◆ raw_tx_buff_length

uint16_t tr_hal_spi_settings_t::raw_tx_buff_length

◆ raw_tx_buffer

uint8_t * tr_hal_spi_settings_t::raw_tx_buffer

◆ receive_watermark

tr_hal_spi_rx_watermark_level_t tr_hal_spi_settings_t::receive_watermark

◆ run_as_controller

bool tr_hal_spi_settings_t::run_as_controller

◆ rx_dma_buff_length

uint16_t tr_hal_spi_settings_t::rx_dma_buff_length

◆ rx_dma_buffer

uint8_t * tr_hal_spi_settings_t::rx_dma_buffer

◆ rx_dma_enabled

bool tr_hal_spi_settings_t::rx_dma_enabled

◆ rx_handler_function

tr_hal_spi_receive_callback_t tr_hal_spi_settings_t::rx_handler_function

◆ sdo_sdi_pins_crossed

bool tr_hal_spi_settings_t::sdo_sdi_pins_crossed

◆ spi_mode

tr_hal_spi_mode_t tr_hal_spi_settings_t::spi_mode

◆ transmit_watermark

tr_hal_spi_tx_watermark_level_t tr_hal_spi_settings_t::transmit_watermark

◆ tx_dma_enabled

bool tr_hal_spi_settings_t::tx_dma_enabled

◆ wake_on_interrupt

bool tr_hal_spi_settings_t::wake_on_interrupt

The documentation for this struct was generated from the following files: