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T32CM11_pwm.h File Reference

This is the chip specific include file for T32CM11 PWM Driver note that there is a common include file for this HAL module that contains the APIs (such as the init function) that should be used by the application. More...

#include "tr_hal_platform.h"
Include dependency graph for T32CM11_pwm.h:
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Data Structures

struct  PWM_REGISTERS_T
 the struct we use so we can address registers using field names More...
struct  tr_hal_pwm_settings_t

Macros

#define TR_HAL_NUM_PWM   5
#define PWM_DEFAULT_PIN   20
#define CHIP_MEMORY_MAP_PWM0_BASE   (0xA0C00000UL)
 chip register addresses section 3.1 of the data sheet explains the Memory map. this gives the base address for how to write the chip registers the chip registers are how the software interacts and configures the PWM peripherals. We create a struct below that addresses the individual registers. This makes it so we can use this base address and a struct field to read or write a chip register
#define CHIP_MEMORY_MAP_PWM1_BASE   (0xA0C00100UL)
#define CHIP_MEMORY_MAP_PWM2_BASE   (0xA0C00200UL)
#define CHIP_MEMORY_MAP_PWM3_BASE   (0xA0C00300UL)
#define CHIP_MEMORY_MAP_PWM4_BASE   (0xA0C00400UL)
#define PWM0_REGISTERS   ((PWM_REGISTERS_T *) CHIP_MEMORY_MAP_PWM0_BASE)
#define PWM1_REGISTERS   ((PWM_REGISTERS_T *) CHIP_MEMORY_MAP_PWM1_BASE)
#define PWM2_REGISTERS   ((PWM_REGISTERS_T *) CHIP_MEMORY_MAP_PWM2_BASE)
#define PWM3_REGISTERS   ((PWM_REGISTERS_T *) CHIP_MEMORY_MAP_PWM3_BASE)
#define PWM4_REGISTERS   ((PWM_REGISTERS_T *) CHIP_MEMORY_MAP_PWM4_BASE)
#define PWM_CTRL_REG_ENABLE_PWM   0x01
#define PWM_CTRL_REG_DISABLE_PWM   0x00
#define PWM_CTRL_REG_ENABLE_CLK   0x02
#define PWM_CTRL_REG_DISABLE_CLK   0x00
#define PWM_CTRL_REG_RESET   0x01
#define PWM_CTRL_REG_RSEQ_FIRST   0x00
#define PWM_CTRL_REG_TSEQ_FIRST   0x01
#define PWM_CTRL_REG_ONE_SEQUENCE   0x00
#define PWM_CTRL_REG_TWO_SEQUENCE   0x02
#define PWM_CTRL_REG_NON_CONTINUOUS   0x00
#define PWM_CTRL_REG_CONTINUOUS   0x04
#define PWM_CTRL_REG_DMA_FORMAT_0   0x00
#define PWM_CTRL_REG_DMA_FORMAT_1   0x08
#define PWM_CTRL_REG_UP_COUNTER   0x00
#define PWM_CTRL_REG_DOWN_AND_UP_COUNTER   0x10
#define PWM_CTRL_REG_TRIGGER_ON_ENABLE   0x00
#define PWM_CTRL_REG_TRIGGER_ON_FIFO   0x20
#define PWM_CTRL_REG_NO_AUTO_TRIGGER   0x00
#define PWM_CTRL_REG_AUTO_TRIGGER   0x40
#define PWM_CLK_DIV_1   0x0000
#define PWM_CLK_DIV_2   0x0100
#define PWM_CLK_DIV_4   0x0200
#define PWM_CLK_DIV_8   0x0300
#define PWM_CLK_DIV_16   0x0400
#define PWM_CLK_DIV_32   0x0500
#define PWM_CLK_DIV_64   0x0600
#define PWM_CLK_DIV_128   0x0700
#define PWM_CLK_DIV_256   0x0800
#define PWM_CLK_DIV_MASK   0x0F00
#define PWM_CTRL_REG_TRIGGER_ON_PWM0   0x0000
#define PWM_CTRL_REG_TRIGGER_ON_PWM1   0x1000
#define PWM_CTRL_REG_TRIGGER_ON_PWM2   0x2000
#define PWM_CTRL_REG_TRIGGER_ON_PWM3   0x3000
#define PWM_CTRL_REG_TRIGGER_ON_PWM4   0x4000
#define PWM_CTRL_REG_SELF_TRIGGER   0x7000
#define PWM_DMA_ENABLE   0x00000001
#define PWM_DMA_DISABLE   0x00000000
#define PWM_DMA_RESET   0x00000001
#define PWM_END_COUNT_CLKDIV_1_1MHZ   0x0020
#define PWM_THRESHHOLD_CLKDIV_1_1MHZ_DUTY_CYCLE_75   0x0018
#define PWM_THRESHHOLD_CLKDIV_1_1MHZ_DUTY_CYCLE_50   0x0010
#define PWM_THRESHHOLD_CLKDIV_1_1MHZ_DUTY_CYCLE_25   0x0008
#define PWM_END_COUNT_CLKDIV_1_500KHZ   0x0040
#define PWM_THRESHHOLD_CLKDIV_1_500KHZ_DUTY_CYCLE_75   0x0030
#define PWM_THRESHHOLD_CLKDIV_1_500KHZ_DUTY_CYCLE_50   0x0020
#define PWM_THRESHHOLD_CLKDIV_1_500KHZ_DUTY_CYCLE_25   0x0010
#define PWM_END_COUNT_CLKDIV_1_250KHZ   0x0080
#define PWM_THRESHHOLD_CLKDIV_1_250KHZ_DUTY_CYCLE_75   0x0060
#define PWM_THRESHHOLD_CLKDIV_1_250KHZ_DUTY_CYCLE_50   0x0040
#define PWM_THRESHHOLD_CLKDIV_1_250KHZ_DUTY_CYCLE_25   0x0020
#define MINIMUM_END_COUNT_VALUE   4
#define MAXIMUM_END_COUNT_VALUE   0x7FFF
#define MINIMUM_THRESHHOLD_VALUE   4
#define MAXIMUM_THRESHHOLD_VALUE   0x7FFF
#define DEFAULT_PWM_CONFIG
 PWM settings for regular sawtooth wave.

Enumerations

enum  tr_hal_pwm_id_t {
  PWM_0_ID = 0 ,
  PWM_1_ID = 1 ,
  PWM_2_ID = 2 ,
  PWM_3_ID = 3 ,
  PWM_4_ID = 4
}
enum  tr_hal_pwm_clk_div_t {
  TR_HAL_PWM_CLOCK_DIVIDER_1 = 1 ,
  TR_HAL_PWM_CLOCK_DIVIDER_2 = 2 ,
  TR_HAL_PWM_CLOCK_DIVIDER_4 = 3 ,
  TR_HAL_PWM_CLOCK_DIVIDER_8 = 4 ,
  TR_HAL_PWM_CLOCK_DIVIDER_16 = 5 ,
  TR_HAL_PWM_CLOCK_DIVIDER_32 = 6 ,
  TR_HAL_PWM_CLOCK_DIVIDER_64 = 7 ,
  TR_HAL_PWM_CLOCK_DIVIDER_128 = 8 ,
  TR_HAL_PWM_CLOCK_DIVIDER_256 = 9
}
enum  tr_hal_pwm_clk_select_t {
  TR_HAL_PWM_CLK_SELECT_PER_CLK = 0 ,
  TR_HAL_PWM_CLK_SELECT_DEFAULT = 0
}

Functions

PWM_REGISTERS_Ttr_hal_pwm_get_register_address (tr_hal_pwm_id_t pwm_id)

Detailed Description

This is the chip specific include file for T32CM11 PWM Driver note that there is a common include file for this HAL module that contains the APIs (such as the init function) that should be used by the application.


this chip supports 5 PWMs at one time. Each PWM can be assigned to a GPIO

SPDX-License-Identifier: LicenseRef-TridentMSLA SPDX-FileCopyrightText: 2025 Trident IoT, LLC https://www.tridentiot.com