T32CZ20_i2c.h File Reference

This is the chip specific include file for T32CZ20 I2C Driver. note that there is a common include file for this HAL module that contains the APIs (such as the init function) that should be used by the application. More...

#include "tr_hal_platform.h"
#include "tr_hal_gpio.h"

Include dependency graph for T32CZ20_i2c.h:

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Data Structures
struct	I2C_REGISTERS_T
struct	tr_hal_i2c_settings_t
struct	tr_hal_i2c_int_count_t

Macros
#define	TR_HAL_MAX_I2C_CONTROLLER_ID   1
#define	NUM_I2C_CONTROLLER   2
#define	DEFAULT_I2C_SCL0_PIN   22
#define	DEFAULT_I2C_SDA0_PIN   23
#define	DEFAULT_I2C_SCL1_PIN   20
#define	DEFAULT_I2C_SDA1_PIN   21
#define	I2C_TX_FIFO_BYTES   18
#define	I2C_RX_FIFO_BYTES   16
#define	CHIP_MEMORY_MAP_I2C_CONTROLLER0_BASE   (0x4002B000UL)
#define	CHIP_MEMORY_MAP_I2C_CONTROLLER1_BASE   (0x4002C000UL)
#define	I2C_CONTROL_ENABLE_CONTROLLER   0x01
#define	I2C_CONTROL_DISABLE_CONTROLLER   0x00
#define	I2C_CONTROL_ENABLE_RESTART   0x02
#define	I2C_CONTROL_STOP_TRANSACTION   0x04
#define	I2C_CONTROL_BUS_CLEAR   0x08
#define	I2C_CONTROL_FIFO_CLEAR   0x10
#define	I2C_BUFFER_SET_FOR_READ   0x100
#define	I2C_BUFFER_SET_FOR_WRITE   0x000
#define	I2C_INTERRUPT_RX_UNDER   0x01
#define	I2C_INTERRUPT_RX_OVER   0x02
#define	I2C_INTERRUPT_RX_FULL   0x04
#define	I2C_INTERRUPT_RX_FINISH   0x08
#define	I2C_INTERRUPT_TX_OVER   0x10
#define	I2C_INTERRUPT_TX_EMPTY   0x20
#define	I2C_INTERRUPT_ABORT_A_NACK   0x40
#define	I2C_INTERRUPT_ABORT_W_NACK   0x80
#define	I2C_INTERRUPT_ABORT_LOST_ARB   0x100
#define	I2C_INTERRUPT_IDLE_STATE   0x200
#define	I2C_INTERRUPT_ALL   0x1FF
#define	I2C0_CHIP_REGISTERS   ((I2C_REGISTERS_T *) CHIP_MEMORY_MAP_I2C_CONTROLLER0_BASE)
#define	I2C1_CHIP_REGISTERS   ((I2C_REGISTERS_T *) CHIP_MEMORY_MAP_I2C_CONTROLLER1_BASE)
#define	I2C_EVENT_RX_UNDER   0x01
#define	I2C_EVENT_RX_OVER   0x02
#define	I2C_EVENT_RX_FULL   0x04
#define	I2C_EVENT_RX_FINISH   0x08
#define	I2C_EVENT_TX_OVER   0x10
#define	I2C_EVENT_TX_EMPTY   0x20
#define	I2C_EVENT_ABORT_A_NACK   0x40
#define	I2C_EVENT_ABORT_W_NACK   0x80
#define	I2C_EVENT_ABORT_LOST_ARB   0x100
#define	I2C_CONFIG_CONTROLLER0
#define	I2C_CONFIG_CONTROLLER1

Typedefs
typedef void(*	tr_hal_i2c_receive_callback_t) (uint8_t received_byte)
typedef void(*	tr_hal_i2c_event_callback_t) (tr_hal_i2c_id_t i2c_id, uint32_t event_bitmask)

Enumerations
enum	tr_hal_i2c_id_t {   I2C_CTRL_0_ID = 0 ,   I2C_CTRL_1_ID = 1 }
	On the T32CZ20 there are 2 I2C available to act as a Controller. More...
enum	tr_hal_i2c_clock_rate_t {   I2C_CLOCK_1_MHZ = 31 ,   I2C_CLOCK_400_KHZ = 79 ,   I2C_CLOCK_200_KHZ = 159 ,   I2C_CLOCK_100_KHZ = 319 ,   I2C_CLOCK_50_KHZ = 639 ,   I2C_CLOCK_10_KHZ = 3199 }

Functions
I2C_REGISTERS_T *	tr_hal_i2c_get_controller_register_address (tr_hal_i2c_id_t i2c_id)

Detailed Description

This is the chip specific include file for T32CZ20 I2C Driver. note that there is a common include file for this HAL module that contains the APIs (such as the init function) that should be used by the application.

---

Trident HAL I2C Controller Driver:

I2C (Inter-Integrated Circuit) also known as IIC, is a 2-wire synchronous, multi-device serial communication protocol. it is simple and low cost but not the fastest (2 wires).

the 2 wires for I2C are: SDA == serial data SCL == serial clock

NXP (who created I2C as Philips in 1982 have changed the terminology of I2C and now substitude "Controller" for "Master" and "Target" for "Slave".

the CZ20 chip has 2 I2C Controllers and 1 I2C Target. Controllers and Target use a different register mapping.

SPDX-License-Identifier: LicenseRef-TridentMSLA SPDX-FileCopyrightText: 2025 Trident IoT, LLC https://www.tridentiot.com

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Macro Definition Documentation

CHIP_MEMORY_MAP_I2C_CONTROLLER0_BASE

#define CHIP_MEMORY_MAP_I2C_CONTROLLER0_BASE   (0x4002B000UL)

---

section 2.2 of the data sheet explains the Memory map this gives the base address for how to write the I2C registers the chip registers are how the software interacts with the I2C chip peripheral. We create a struct below that addresses the individual registers. This makes it so we can use this base address and a struct field to read or write a chip register

---

CHIP_MEMORY_MAP_I2C_CONTROLLER1_BASE

#define CHIP_MEMORY_MAP_I2C_CONTROLLER1_BASE   (0x4002C000UL)

DEFAULT_I2C_SCL0_PIN

#define DEFAULT_I2C_SCL0_PIN   22

DEFAULT_I2C_SCL1_PIN

#define DEFAULT_I2C_SCL1_PIN   20

DEFAULT_I2C_SDA0_PIN

#define DEFAULT_I2C_SDA0_PIN   23

DEFAULT_I2C_SDA1_PIN

#define DEFAULT_I2C_SDA1_PIN   21

I2C0_CHIP_REGISTERS

#define I2C0_CHIP_REGISTERS   ((I2C_REGISTERS_T *) CHIP_MEMORY_MAP_I2C_CONTROLLER0_BASE)

I2C1_CHIP_REGISTERS

#define I2C1_CHIP_REGISTERS   ((I2C_REGISTERS_T *) CHIP_MEMORY_MAP_I2C_CONTROLLER1_BASE)

I2C_BUFFER_SET_FOR_READ

#define I2C_BUFFER_SET_FOR_READ   0x100

I2C_BUFFER_SET_FOR_WRITE

#define I2C_BUFFER_SET_FOR_WRITE   0x000

I2C_CONFIG_CONTROLLER0

#define I2C_CONFIG_CONTROLLER0

Value:

    {                                                           \
        .sda_pin = (tr_hal_gpio_pin_t) { DEFAULT_I2C_SDA0_PIN },\
        .scl_pin = (tr_hal_gpio_pin_t) { DEFAULT_I2C_SCL0_PIN },\
        .clock_setting = I2C_CLOCK_100_KHZ,                     \
        .rx_handler_function = NULL,                            \
        .event_handler_fx = NULL,                               \
        .enable_chip_interrupts = true,                         \
        .interrupt_priority = TR_HAL_INTERRUPT_PRIORITY_5,      \
        .wake_on_interrupt = false,                             \
    }

---

initializer macros for default I2C CONTROLLER setting

---

I2C_CONFIG_CONTROLLER1

#define I2C_CONFIG_CONTROLLER1

Value:

    {                                                           \
        .sda_pin = (tr_hal_gpio_pin_t) { DEFAULT_I2C_SDA1_PIN },\
        .scl_pin = (tr_hal_gpio_pin_t) { DEFAULT_I2C_SCL1_PIN },\
        .clock_setting = I2C_CLOCK_100_KHZ,                     \
        .rx_handler_function = NULL,                            \
        .event_handler_fx = NULL,                               \
        .enable_chip_interrupts = true,                         \
        .interrupt_priority = TR_HAL_INTERRUPT_PRIORITY_5,      \
        .wake_on_interrupt = false,                             \
    }

I2C_CONTROL_BUS_CLEAR

#define I2C_CONTROL_BUS_CLEAR   0x08

I2C_CONTROL_DISABLE_CONTROLLER

#define I2C_CONTROL_DISABLE_CONTROLLER   0x00

I2C_CONTROL_ENABLE_CONTROLLER

#define I2C_CONTROL_ENABLE_CONTROLLER   0x01

I2C_CONTROL_ENABLE_RESTART

#define I2C_CONTROL_ENABLE_RESTART   0x02

I2C_CONTROL_FIFO_CLEAR

#define I2C_CONTROL_FIFO_CLEAR   0x10

I2C_CONTROL_STOP_TRANSACTION

#define I2C_CONTROL_STOP_TRANSACTION   0x04

I2C_EVENT_ABORT_A_NACK

#define I2C_EVENT_ABORT_A_NACK   0x40

I2C_EVENT_ABORT_LOST_ARB

#define I2C_EVENT_ABORT_LOST_ARB   0x100

I2C_EVENT_ABORT_W_NACK

#define I2C_EVENT_ABORT_W_NACK   0x80

I2C_EVENT_RX_FINISH

#define I2C_EVENT_RX_FINISH   0x08

I2C_EVENT_RX_FULL

#define I2C_EVENT_RX_FULL   0x04

I2C_EVENT_RX_OVER

#define I2C_EVENT_RX_OVER   0x02

I2C_EVENT_RX_UNDER

#define I2C_EVENT_RX_UNDER   0x01

---

I2C events

---

I2C_EVENT_TX_EMPTY

#define I2C_EVENT_TX_EMPTY   0x20

I2C_EVENT_TX_OVER

#define I2C_EVENT_TX_OVER   0x10

I2C_INTERRUPT_ABORT_A_NACK

#define I2C_INTERRUPT_ABORT_A_NACK   0x40

I2C_INTERRUPT_ABORT_LOST_ARB

#define I2C_INTERRUPT_ABORT_LOST_ARB   0x100

I2C_INTERRUPT_ABORT_W_NACK

#define I2C_INTERRUPT_ABORT_W_NACK   0x80

I2C_INTERRUPT_ALL

#define I2C_INTERRUPT_ALL   0x1FF

I2C_INTERRUPT_IDLE_STATE

#define I2C_INTERRUPT_IDLE_STATE   0x200

I2C_INTERRUPT_RX_FINISH

#define I2C_INTERRUPT_RX_FINISH   0x08

I2C_INTERRUPT_RX_FULL

#define I2C_INTERRUPT_RX_FULL   0x04

I2C_INTERRUPT_RX_OVER

#define I2C_INTERRUPT_RX_OVER   0x02

I2C_INTERRUPT_RX_UNDER

#define I2C_INTERRUPT_RX_UNDER   0x01

I2C_INTERRUPT_TX_EMPTY

#define I2C_INTERRUPT_TX_EMPTY   0x20

I2C_INTERRUPT_TX_OVER

#define I2C_INTERRUPT_TX_OVER   0x10

I2C_RX_FIFO_BYTES

#define I2C_RX_FIFO_BYTES   16

I2C_TX_FIFO_BYTES

#define I2C_TX_FIFO_BYTES   18

NUM_I2C_CONTROLLER

#define NUM_I2C_CONTROLLER   2

TR_HAL_MAX_I2C_CONTROLLER_ID

#define TR_HAL_MAX_I2C_CONTROLLER_ID   1

Typedef Documentation

tr_hal_i2c_event_callback_t

typedef void(* tr_hal_i2c_event_callback_t) (tr_hal_i2c_id_t i2c_id, uint32_t event_bitmask)

tr_hal_i2c_receive_callback_t

typedef void(* tr_hal_i2c_receive_callback_t) (uint8_t received_byte)

Enumeration Type Documentation

tr_hal_i2c_clock_rate_t

enum tr_hal_i2c_clock_rate_t

Enumerator
I2C_CLOCK_1_MHZ
I2C_CLOCK_400_KHZ
I2C_CLOCK_200_KHZ
I2C_CLOCK_100_KHZ
I2C_CLOCK_50_KHZ
I2C_CLOCK_10_KHZ

tr_hal_i2c_id_t

enum tr_hal_i2c_id_t

On the T32CZ20 there are 2 I2C available to act as a Controller.

Enumerator
I2C_CTRL_0_ID
I2C_CTRL_1_ID

Function Documentation

tr_hal_i2c_get_controller_register_address()

I2C_REGISTERS_T * tr_hal_i2c_get_controller_register_address

(

tr_hal_i2c_id_t

i2c_id

)

---

if the app wants to directly interface with the chip registers, this is a convenience function for getting the address/struct of a particular I2C Controller so the chip registers can be accessed.

---