This is the chip specific include file for T32CM11 UART Driver note that there is a common include file for this HAL module that contains the APIs (such as the init function) that should be used by the application. More...

#include "tr_hal_platform.h"
#include "tr_hal_gpio.h"

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Data Structures
struct	UART_REGISTERS_T

struct	tr_hal_uart_settings_t

Macros
#define	TR_NUMBER_OF_UARTS 3

#define	LOW_BYTES_BUFFER_THRESHHOLD 16

#define	MAX_RAW_TX_DATA_BUFFER_SIZE 256

#define	DMA_RX_BUFF_MINIMUM_SIZE 16

#define	TX_FIFO_SIZE 16

#define	UART_INVALID_PIN 0xFF

#define	UART0_TX_PIN_OPTION1 17

#define	UART0_RX_PIN_OPTION1 16

#define	UART1_TX_PIN_OPTION1 4

#define	UART1_RX_PIN_OPTION1 5

#define	UART1_TX_PIN_OPTION3 28

#define	UART1_RX_PIN_OPTION3 29

#define	UART1_RTS_PIN_OPTION1 14

#define	UART1_CTS_PIN_OPTION1 15

#define	UART1_RTS_PIN_OPTION2 20

#define	UART1_CTS_PIN_OPTION2 21

#define	UART2_TX_PIN_OPTION1 6

#define	UART2_RX_PIN_OPTION1 7

#define	UART2_TX_PIN_OPTION3 30

#define	UART2_RX_PIN_OPTION3 31

#define	TR_HAL_PIN_NOT_SET 255

#define	CHIP_MEMORY_MAP_UART0_BASE (0xA0000000UL)

#define	CHIP_MEMORY_MAP_UART1_BASE (0xA0500000UL)

#define	CHIP_MEMORY_MAP_UART2_BASE (0xA0600000UL)

#define	transmitter_holding_register receive_buffer_register

#define	interrupt_identification_register FIFO_control_register

#define	divisor_latch_LSB receive_buffer_register

#define	divisor_latch_MSB interrupt_enable_register

#define	UART0_CHIP_REGISTERS ((UART_REGISTERS_T *) CHIP_MEMORY_MAP_UART0_BASE)

#define	UART1_CHIP_REGISTERS ((UART_REGISTERS_T *) CHIP_MEMORY_MAP_UART1_BASE)

#define	UART2_CHIP_REGISTERS ((UART_REGISTERS_T *) CHIP_MEMORY_MAP_UART2_BASE)

#define	IER_ENABLE_RECEIVE_DATA_AVAIL_INT 0x01

#define	IER_ENABLE_READY_TO_TRANSMIT_INT 0x02

#define	IER_ENABLE_FRAMING_PARITY_OVERRUN_ERROR_INT 0x04

#define	IER_ENABLE_MODEM_STATUS_INT 0x08

#define	FCR_FIFO_ENABLE 0x01

#define	FCR_CLEAR_RECEIVER 0x02

#define	FCR_CLEAR_TRANSMIT 0x04

#define	FCR_DMA_SELECT 0x08

#define	FCR_TRIGGER_MASK 0xC0

#define	IIR_INTERRUPT_MASK 0x0F

#define	IIR_NO_INTERRUPT_PENDING 0x01

#define	IIR_MODEM_STATUS_INTERRUPT 0x00

#define	IIR_THR_EMPTY_INTERRUPT 0x02

#define	IIR_RECEIVER_ERROR_INTERRUPT 0x06

#define	IIR_RX_DATA_AVAIL_INTERRUPT 0x04

#define	IIR_CHAR_TIMEOUT_INTERRUPT 0x0C

#define	LCR_DATA_BITS_MASK 0x03

#define	LCR_DATA_BITS_INV_MASK 0xFC

#define	LCR_STOP_BITS_MASK 0x04

#define	LCR_STOP_BITS_INV_MASK 0xFB

#define	LCR_PARITY_BITS_MASK 0x18

#define	LCR_PARITY_BITS_INV_MASK 0xE7

#define	LCR_BAUD_RATE_SETTING_MASK 0x80

#define	LSR_DATA_READY 0x01

#define	LSR_OVERRUN_ERROR 0x02

#define	LSR_PARITY_ERROR 0x04

#define	LSR_FRAMING_ERROR 0x08

#define	LSR_BREAK_INDICATOR 0x10

#define	LSR_TRANSMITTER_HOLDING_REG_EMPTY 0x20

#define	LSR_TRANSMITTER_EMPTY 0x40

#define	LSR_FIFO_ERROR 0x80

#define	MSR_DCTS 0x01

#define	MSR_DDSR 0x02

#define	MSR_TERI 0x04

#define	MSR_DDCD 0x08

#define	MSR_CTS 0x10

#define	MSR_DSR 0x20

#define	MSR_RI 0x40

#define	MSR_DCD 0x80

#define	DMA_IER_ENABLE_RECEIVE_INT 0x01

#define	DMA_IER_ENABLE_TRANSMIT_INT 0x02

#define	DMA_RECEIVE_INTERRUPT 0x01

#define	DMA_TRANSMIT_INTERRUPT 0x02

#define	UART_DMA_ENABLE 0x01

#define	UART_DMA_DISABLE 0x00

#define	DEFAULT_UART0_CONFIG

#define	DEFAULT_UART1_CONFIG

#define	DEFAULT_UART2_CONFIG

#define	TR_HAL_UART_EVENT_DMA_TX_COMPLETE 0x00000001

#define	TR_HAL_UART_EVENT_DMA_RX_BUFFER_LOW 0x00000002

#define	TR_HAL_UART_EVENT_DMA_RX_TO_USER_FX 0x00000004

#define	TR_HAL_UART_EVENT_DMA_RX_READY 0x00000008

#define	TR_HAL_UART_EVENT_TX_COMPLETE 0x00000010

#define	TR_HAL_UART_EVENT_TX_STILL_GOING 0x00000020

#define	TR_HAL_UART_EVENT_RX_TO_USER_FX 0x00000040

#define	TR_HAL_UART_EVENT_RX_READY 0x00000080

#define	TR_HAL_UART_EVENT_RX_ENDED_TO_USER_FX 0x00000100

#define	TR_HAL_UART_EVENT_RX_ENDED_NO_DATA 0x00000200

#define	TR_HAL_UART_EVENT_RX_MAYBE_READY 0x00000400

#define	TR_HAL_UART_EVENT_RX_ERR_OVERRUN 0x00000800

#define	TR_HAL_UART_EVENT_RX_ERR_PARITY 0x00001000

#define	TR_HAL_UART_EVENT_RX_ERR_FRAMING 0x00002000

#define	TR_HAL_UART_EVENT_RX_ERR_BREAK 0x00004000

#define	TR_HAL_UART_EVENT_HW_FLOW_CONTROL 0x00008000

#define	TR_HAL_UART_EVENT_UNEXPECTED 0x00010000

Typedefs
typedef void(*	tr_hal_uart_receive_callback_t) (uint8_t received_byte)

typedef void(*	tr_hal_uart_event_callback_t) (uint32_t event_bitmask)

Enumerations
enum	tr_hal_uart_id_t { UART_0_ID = 0 , UART_1_ID = 1 , UART_2_ID = 2 }

enum	tr_hal_fifo_trigger_t { FCR_TRIGGER_1_BYTE = 0x00 , FCR_TRIGGER_4_BYTES = 0x40 , FCR_TRIGGER_8_BYTES = 0x80 , FCR_TRIGGER_14_BYTES = 0xC0 , FCR_NO_TRIGGER = 0xFF }

enum	tr_hal_data_bits_t { LCR_DATA_BITS_5_VALUE = 0x00 , LCR_DATA_BITS_6_VALUE = 0x01 , LCR_DATA_BITS_7_VALUE = 0x02 , LCR_DATA_BITS_8_VALUE = 0x03 , LCR_DATA_BITS_INVALID_VALUE = 0xFF }

enum	tr_hal_stop_bits_t { LCR_STOP_BITS_ONE_VALUE = 0x00 , LCR_STOP_BITS_TWO_VALUE = 0x04 , LCR_STOP_BITS_INVALID_VALUE = 0xFF }

enum	tr_hal_parity_t { LCR_PARITY_NONE_VALUE = 0x00 , LCR_PARITY_ODD_VALUE = 0x08 , LCR_PARITY_EVEN_VALUE = 0x16 , LCR_PARITY_INVALID_VALUE = 0xFF }

enum	tr_hal_hw_fc_t { MCR_NO_FLOW_CONTROL_VALUE = 0x00 , MCR_SET_DTR_READY = 0x01 , MCR_SET_RTS_READY = 0x02 , MCR_SET_CTS_ENABLED = 0x20 }

enum	tr_hal_baud_rate_t { TR_HAL_UART_BAUD_RATE_2400 = 1667 , TR_HAL_UART_BAUD_RATE_4800 = 833 , TR_HAL_UART_BAUD_RATE_9600 = 417 , TR_HAL_UART_BAUD_RATE_14400 = 278 , TR_HAL_UART_BAUD_RATE_19200 = 208 , TR_HAL_UART_BAUD_RATE_28800 = 139 , TR_HAL_UART_BAUD_RATE_38400 = 104 , TR_HAL_UART_BAUD_RATE_57600 = 69 , TR_HAL_UART_BAUD_RATE_76800 = 52 , TR_HAL_UART_BAUD_RATE_115200 = 35 , TR_HAL_UART_BAUD_RATE_500000 = 8 , TR_HAL_UART_BAUD_RATE_1000000 = 4 , TR_HAL_UART_BAUD_RATE_2000000 = 2 , TR_HAL_UART_BAUD_RATE_ERROR = 1 }

Functions
UART_REGISTERS_T *	tr_hal_uart_get_uart_register_address (tr_hal_uart_id_t uart_id)

Detailed Description

This is the chip specific include file for T32CM11 UART Driver note that there is a common include file for this HAL module that contains the APIs (such as the init function) that should be used by the application.

Trident HAL UART Driver:

This module contains APIs for interacting with the Trident HAL for UART. This defines a struct to use for setting up a UART and APIs to transmit and receive from a UART. It also defines a struct that allows interaction with the chip registers.

before setting up a UART, pick how it will be used:

— transmit —

transmit using the raw TX APIs
transmit using DMA TX APIs

— receive —

receive automatically in the user defined receive function (this is recommended)
receive using DMA RX, where the app manages the DMA RX buffer
receive using the raw API calls

UART configuration is done by setting fields in an instance of the tr_hal_uart_settings_t struct and then passing this instance to tr_hal_uart_init.

There is a define that can be used to initialize an instance to the default values for that particular UART. for instance, to init UART1 to default values set it to T32CM11_DEFAULT_UART1_CONFIG, like this: tr_hal_uart_settings_t g_uart1_settings = T32CM11_DEFAULT_UART1_CONFIG;

if a user defined receive function is set (rx_handler_function) then the Trident HAL will manage the chip interrupts and registers and will pass received bytes to this user receive function. This is the recommended way to get UART communication working. If this method is used then the app will just handle bytes that come in to the user receive function and can send responses using any of the TX APIs, for instance: tr_hal_uart_raw_tx_one_byte(UART_1_ID, &byte_to_send); tr_hal_uart_raw_tx_buffer(UART_1_ID, &bytes_to_send, send_length);

alternatively, the UART can be setup to use the chip DMA functions to transmit or receive bytes. Set the correct fields in the tr_hal_uart_settings_t to enable DMA TX (tx_dma_enabled) or DMA RX (rx_dma_enabled).

SPDX-License-Identifier: LicenseRef-TridentMSLA SPDX-FileCopyrightText: 2025 Trident IoT, LLC https://www.tridentiot.com

Trident IoT SDK

Data Structures

Macros

Typedefs

Enumerations

Functions

Detailed Description