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T32CZ20_power.h File Reference

This is the chip specific include file for T32CZ20 Power Management note that there is a common include file for this HAL module that contains the APIs (such as the init function) that should be used by the application. More...

#include "tr_hal_platform.h"
+ Include dependency graph for T32CZ20_power.h:
+ This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Data Structures

struct  DEEP_POWER_DOWN_REGISTERS_T
 offsets for where to find chip registers needed for Deep Power Down register which is used to see section 4.8 and 5.5 in the chip datasheet More...
 
struct  POWER_MGMT_REGISTERS_T
 offsets for where to find chip registers needed for Power Mgmt register. This is not documented in the Reference Manual More...
 

Macros

#define CHIP_MEMORY_MAP_DEEP_PWR_DOWN_BASE   (0x40005000UL)
 chip register addresses section 2.2 of the data sheet explains the Memory map. this gives the base address for how to write the chip registers the chip registers are how the software interacts configures GPIOs, reads GPIOs, and gets/sets information on the chip We create a struct below that addresses the individual registers. This makes it so we can use this base address and a struct field to read or write a chip register
 
#define CHIP_MEMORY_MAP_POWER_MGMT_BASE   (0x40006000UL)
 
#define TR_HAL_RESET_REASON_POWER   0x01
 
#define TR_HAL_RESET_REASON_EXTERNAL_RESET   0x02
 
#define TR_HAL_RESET_REASON_DEEP_POWER_DOWN   0x04
 
#define TR_HAL_RESET_REASON_DEEP_SLEEP   0x08
 
#define TR_HAL_RESET_REASON_WATCHDOG   0x10
 
#define TR_HAL_RESET_REASON_SOFTWARE   0x20
 
#define TR_HAL_RESET_REASON_MCU_LOCKUP   0x40
 
#define DEEP_POWER_DOWN_CHIP_REGISTERS   ((DEEP_POWER_DOWN_REGISTERS_T *) CHIP_MEMORY_MAP_DEEP_PWR_DOWN_BASE)
 
#define PM_RCO_1M_TUNE_FINE_MASK   0x8F
 
#define PM_RCO_1M_TUNE_COARSE_MASK   0xF00
 
#define PM_RCO_1M_ENABLE_BIT   0x10000
 
#define PM_RCO_32K_TUNE_FINE_MASK   0xFF
 
#define PM_RCO_32K_TUNE_COARSE_MASK   0x300
 
#define PM_RCO_32K_ENABLE_BIT   0x01000000
 
#define POWER_MGMT_CHIP_REGISTERS   ((POWER_MGMT_REGISTERS_T *) CHIP_MEMORY_MAP_POWER_MGMT_BASE)
 

Enumerations

enum  tr_hal_power_mode_t {
  TR_HAL_POWER_MODE_0 = 10 ,
  TR_HAL_POWER_MODE_1 = 11 ,
  TR_HAL_POWER_MODE_2 = 12 ,
  TR_HAL_POWER_MODE_3 = 13
}
 enum for the different power modes that the chip can be in see section 5, table 5-2 More...
 
enum  tr_hal_clock_t {
  TR_HAL_CLOCK_32M = 0 ,
  TR_HAL_CLOCK_16M = 1 ,
  TR_HAL_CLOCK_1M = 2 ,
  TR_HAL_CLOCK_32K = 3
}
 enum for the different clocks some of these can be disabled and some cannot, the crystal oscillator cannot be disabled but will be off when the device is sleeping 32MHz - per clk using the crystal oscillator at 32 MHz 16MHz - per clk using the crystal oscillator at 32 MHz rco1m - RC oscillator at 921.6 KHz ~= 1MHz rco32k - RC oscillator for slow clock timers, runs at 38.4 KHz More...
 

Detailed Description

This is the chip specific include file for T32CZ20 Power Management note that there is a common include file for this HAL module that contains the APIs (such as the init function) that should be used by the application.


SPDX-License-Identifier: LicenseRef-TridentMSLA SPDX-FileCopyrightText: 2025 Trident IoT, LLC https://www.tridentiot.com